1. Field of the Invention
The present invention relates to an image sensor and an image capture apparatus which have a pixel signal addition function.
2. Description of the Related Art
Along with the recent size reduction of pixels in an image sensor, the light receiving area per pixel is becoming smaller, and the amount of receivable light is decreasing. For this reason, the S/N ratio of the pixel value output from one pixel tends to be lower. Various techniques have been developed to implement a high S/N ratio by forming a structure for adding the pixel values of pixels even if an image sensor has finer pixels.
For example, Japanese Patent Laid-Open No. 2010-245951 discloses a method of adding pixel signals as analog signals for each column and appropriately switching transistors, thereby averaging charges from a plurality of pixels. On the other hand, Japanese Patent Laid-Open No. 2005-278135 discloses a method of causing an analog/digital conversion (A/D conversion) unit provided for each column to add digital signals by digital arithmetic processing.
However, in the related art disclosed in Japanese Patent Laid-Open No. 2010-245951 described above, horizontal addition is done for each column connected to the averaging unit. It is therefore impossible to perform addition for each arbitrary column because of the circuit arrangement. In the related art disclosed in Japanese Patent Laid-Open No. 2005-278135, digital addition is performed during digital arithmetic processing of the A/D conversion unit. For this reason, performing digital conversion processing for each pixel undesirably makes the conversion period longer as compared to an arrangement without addition. In addition, since vertical addition (row-direction addition) is performed after digital conversion processing of pixel signals, a line memory is needed, resulting in a larger circuit scale.